Difference between revisions of "ST STM32C0"

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! Device || Base address !! Size || J-Link Support
 
! Device || Base address !! Size || J-Link Support
 
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| style="text-align:center;"| STM32C031x4 || style="text-align:center;"| 0x00000000 || style="text-align:center;"| 16 KB || style="text-align:center;"| {{YES}}
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| style="text-align:center;"| STM32C031x4 || style="text-align:center;"| 0x08000000|| style="text-align:center;"| 16 KB || style="text-align:center;"| {{YES}}
 
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| style="text-align:center;"| STM32C031x6 || style="text-align:center;"| 0x00000000 || style="text-align:center;"| 32KB || style="text-align:center;"| {{YES}}
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| style="text-align:center;"| STM32C031x6 || style="text-align:center;"| 0x08000000|| style="text-align:center;"| 32KB || style="text-align:center;"| {{YES}}
 
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Revision as of 16:44, 17 January 2023

The ST STM32C0 series are microcontrollers based on the Arm® Cortex®-M0+ processor.

Flash Banks

Internal Flash

Device Base address Size J-Link Support
STM32C031x4 0x08000000 16 KB YES.png
STM32C031x6 0x08000000 32KB YES.png

Device Specifc Handling

Reset

  • The devices uses normal Cortex-M reset, no special handling necessary, like described here.

Evaluation Boards

Example Application