Difference between revisions of "ST STM32C0"
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==Evaluation Boards== |
==Evaluation Boards== |
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+ | *ST-STM32C0116-DK evaluation board: https://wiki.segger.com/ST_STM32C0116-DK |
==Example Application== |
==Example Application== |
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+ | *ST-STM32C0116-DK evaluation board: https://wiki.segger.com/ST_STM32C0116-DK#Example_Project |
Latest revision as of 16:46, 17 January 2023
Contents
The ST STM32C0 series are microcontrollers based on the Arm®
Cortex®-M0+ processor.
Flash Banks
Internal Flash
| Device | Base address | Size | J-Link Support |
|---|---|---|---|
| STM32C0xxx4 | 0x08000000 | 16 KB | 
|
| STM32C0xxx6 | 0x08000000 | 32KB |
|
Device Specifc Handling
Reset
- The devices uses normal Cortex-M reset, no special handling necessary, like described here.
Evaluation Boards
- ST-STM32C0116-DK evaluation board: https://wiki.segger.com/ST_STM32C0116-DK
Example Application
- ST-STM32C0116-DK evaluation board: https://wiki.segger.com/ST_STM32C0116-DK#Example_Project
