Difference between revisions of "ST STM32L0"
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!colspan="3"| Main flash memory |
!colspan="3"| Main flash memory |
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+ | | STM32L0xxx3 || 0x0800_0000 - 0x0800_1FFF || 8 KB |
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+ | | STM32L0xxx4 || 0x0800_0000 - 0x0800_3FFF || 16 KB |
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+ | | STM32L0xxx6 || 0x0800_0000 - 0x0800_7FFF || 32 KB |
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+ | | STM32L0xxx8 || 0x0800_0000 - 0x0800_FFFF || 64 KB |
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| + | | STM32L0xxxB || 0x0800_0000 - 0x0801_FFFF || 128 KB |
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| STM32L0xxxZ || 0x0800_0000 - 0x0802_FFFF || 192 KB |
| STM32L0xxxZ || 0x0800_0000 - 0x0802_FFFF || 192 KB |
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Latest revision as of 11:53, 15 April 2024
This article describes device specifics of the ST STM32L0 series devices. The STM32L0 devices are Cortex-M0 based low power MCUs.
Contents
Flash
The following flash regions are supported by J-Link.
| Device | Range | Total size |
|---|---|---|
| Main flash memory | ||
| STM32L0xxx3 | 0x0800_0000 - 0x0800_1FFF | 8 KB |
| STM32L0xxx4 | 0x0800_0000 - 0x0800_3FFF | 16 KB |
| STM32L0xxx6 | 0x0800_0000 - 0x0800_7FFF | 32 KB |
| STM32L0xxx8 | 0x0800_0000 - 0x0800_FFFF | 64 KB |
| STM32L0xxxB | 0x0800_0000 - 0x0801_FFFF | 128 KB |
| STM32L0xxxZ | 0x0800_0000 - 0x0802_FFFF | 192 KB |
| Option bytes [1] | ||
| All | 0x1FF8_0000 - 0x1FF8_001F | 32 bytes |
- ↑ See: Option byte programming
Reset
For the STM32L0 devices, the Cortex-M default reset strategy is used.
Debug specific
Please refer to the generic STM32 article.
Option byte programming
Please refer to the generic STM32 article.
Securing/unsecuring the device
Please refer to the generic STM32 article.
