SemiDrive E34xx

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Revision as of 13:10, 30 May 2023 by Arne.kulinna (talk | contribs) (Created page with "__TOC__ The SemiDrive E34xx are Cortex-R5 based MCUs. ==Internal Flash== E34xx devices have no internal flash. ==ECC RAM== E34xx devices have ECC RAM which can be disabled....")
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The SemiDrive E34xx are Cortex-R5 based MCUs.

Internal Flash

E34xx devices have no internal flash.

ECC RAM

E34xx devices have ECC RAM which can be disabled. However, a connect to E34xx devices will initialize 1MB at 0x400000.

Reset

No device specific reset is necessary. The normal Cortex-R reset is performed.

See here for more information: https://wiki.segger.com/J-Link_Reset_Strategies#Strategies_for_ARMv8-AR_devices

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