Difference between revisions of "Silicon Labs EFR32xG25"
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==Watchdog Handling== |
==Watchdog Handling== |
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| − | *The device |
+ | *The device has 2 Watchdogs, they are feed during prorgamming. |
| − | *The device has a watchdog [WATCHDOGNAME]. |
||
| − | *The watchdog is fed during flash programming. |
||
| − | *If the watchdog is enabled, it is turned off during flash programming and turned back on afterwards. |
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Revision as of 13:40, 5 June 2023
The Silicon Labs EFR32xG25 are wireless SoCs based on Cortex-M33 microcontrollers.
Contents
Flash Banks
Internal Flash
| Flash Bank | Base address | Size | J-Link Support |
|---|---|---|---|
| Internal flash | 0x08000000 | Up to 1920 KB | 
|
| User Data | 0x0FE00000 | 1 KB |
|
Watchdog Handling
- The device has 2 Watchdogs, they are feed during prorgamming.
Device Specific Handling
Connect
Reset
- The devices uses normal Cortex-M reset, no special handling necessary, like described here.
- The devices uses Cortex-M Core reset, no special handling necessary, like described here.
- The devices uses Cortex-M Rest Pin, no special handling necessary, like described here.
- The device uses custom reset:.....
Attach
Attach is not supported by default because the J-Link initializes certain RAM regions by default.
Security
Evaluation Boards
- [SiliconVendor] [EvalBoardName] evaluation board: http://techwiki.segger.local/WikiTemplateEvalBoard
Example Application
- [SiliconVendor] [EvalBoardName] evaluation board: http://techwiki.segger.local/WikiTemplateEvalBoard#Example_Project
