Silicon Labs EFR32xG25
The Silicon Labs EFR32xG25 are wireless SoCs based on Cortex-M33 microcontrollers.
Contents
Flash Banks
Internal Flash
| Flash Bank | Base address | Size | J-Link Support |
|---|---|---|---|
| Internal flash | 0x08000000 | Up to 1920 KB | 
|
| User Data | 0x0FE00000 | 1 KB |
|
Watchdog Handling
- The device has 2 Watchdogs, they are feed during programming, if they are enabled.
Device Specific Handling
Connect
Reset
- The device uses custom reset with halt after bootloader.
Attach
Attach is not supported by default because the J-Link initializes certain RAM regions by default.
Security
Evaluation Boards
- [SiliconVendor] [EvalBoardName] evaluation board: http://techwiki.segger.local/WikiTemplateEvalBoard
Example Application
- [SiliconVendor] [EvalBoardName] evaluation board: http://techwiki.segger.local/WikiTemplateEvalBoard#Example_Project
