User contributions
This user is currently blocked. The latest block log entry is provided below for reference:
- 15:54, 29 March 2022 Admin (talk | contribs) changed block settings for Sebastian (talk | contribs) with an expiration time of indefinite (account creation disabled, autoblock disabled, email disabled) (offboarding)
- 08:41, 23 June 2020 (diff | hist) . . (+500) . . i.MXRT1060 (→Hyper Flash)
- 10:19, 17 June 2020 (diff | hist) . . (-32) . . RZ A1H (→QSPI Flash Programming Support) (current)
- 10:19, 17 June 2020 (diff | hist) . . (-1) . . RZ A1L (→QSPI Flash Programming Support)
- 10:19, 17 June 2020 (diff | hist) . . (-31) . . RZ A1L (→Quad-SPI Interface Pins)
- 10:18, 17 June 2020 (diff | hist) . . (+1,042) . . N RZ A1L (Created page with "__TOC__ The Renesas RZ/A1L is a high-end 32-bit CPU, based on the Cortex-A9 core. = QSPI Flash Programming Support = QSPI Flash programming support is provided through the...")
- 10:16, 17 June 2020 (diff | hist) . . (+22) . . Debug Probes - J-Link & J-Trace (→Renesas)
- 10:15, 17 June 2020 (diff | hist) . . (+896) . . RZ A1H
- 15:16, 26 May 2020 (diff | hist) . . (+13) . . Software and Hardware Features Overview (→J-Link EDU Mini)
- 13:47, 30 April 2020 (diff | hist) . . (-1) . . Infineon S25Hx256T / S25Hx512T / S25Hx01GT serial flash
- 13:45, 30 April 2020 (diff | hist) . . (+515) . . N Infineon S25Hx256T / S25Hx512T / S25Hx01GT serial flash (Created page with "J-Flash SPI supports only SPI Flashes with uniform sector sizes. By default the Cypress S25Hx256T/512T/01GT have a hybrid sector architecture. Therefore you need to set the co...")
- 13:36, 30 April 2020 (diff | hist) . . (+61) . . Debug Probes - J-Link & J-Trace (→J-Flash SPI)
- 13:36, 30 April 2020 (diff | hist) . . (-48) . . Debug Probes - J-Link & J-Trace (→J-Flash)
- 13:35, 30 April 2020 (diff | hist) . . (+1) . . Debug Probes - J-Link & J-Trace (→J-Flash)
- 13:35, 30 April 2020 (diff | hist) . . (+47) . . Debug Probes - J-Link & J-Trace (→J-Flash)
- 16:09, 28 April 2020 (diff | hist) . . (+1,104) . . N Cyclone V (Created page with "__TOC__ = Flash Programming = Altera Cyclone V features a Cortex-A9 core without internal flash but with support for QSPI. Official flash programming support has been added i...")
- 15:49, 28 April 2020 (diff | hist) . . (+34) . . Debug Probes - J-Link & J-Trace (→Device specifics)
- 17:19, 19 March 2020 (diff | hist) . . (-1) . . STM32H745I-Discovery (→Quad-SPI Interface Pins) (current)
- 17:16, 19 March 2020 (diff | hist) . . (0) . . File:ST STM32H745I Disco QSPI DualFlash.elf (Sebastian uploaded a new version of File:ST STM32H745I Disco QSPI DualFlash.elf) (current)
- 13:30, 19 March 2020 (diff | hist) . . (+28) . . STM32H745I-Discovery
- 13:26, 19 March 2020 (diff | hist) . . (+5) . . STM32H745I-Discovery (→Quad-SPI Interface Pins)