Difference between revisions of "Template:JLinkSupportedCores"
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J-Link provides debugging support for the following cores.<br> |
J-Link provides debugging support for the following cores.<br> |
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{{Note|1=If you are interested in J-Link support for a core that is not listed here, please feel free to request support via the [https://www.segger.com/ticket SEGGER support ticket system].}} |
{{Note|1=If you are interested in J-Link support for a core that is not listed here, please feel free to request support via the [https://www.segger.com/ticket SEGGER support ticket system].}} |
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Revision as of 15:17, 20 December 2022
J-Link provides debugging support for the following cores.
Note:
If you are interested in J-Link support for a core that is not listed here, please feel free to request support via the SEGGER support ticket system.
If you are interested in J-Link support for a core that is not listed here, please feel free to request support via the SEGGER support ticket system.
Architecture | Supported |
---|---|
ARM legacy Cores | |
ARM7 | |
ARM9 | |
ARM11 | |
ARM Cortex Cores | |
Cortex-A5 | |
Cortex-A7 | |
Cortex-A8 | |
Cortex-A9 | |
Cortex-A12 | |
Cortex-A15 | |
Cortex-A17 | |
Cortex-A53 | |
Cortex-A55 | |
Cortex-A57 | |
Cortex-A72 | |
Cortex-M0 | |
Cortex-M0+ | |
Cortex-M1 | |
Cortex-M3 | |
Cortex-M4 | |
Cortex-M7 | |
Cortex-M23 | |
Cortex-M33 | |
Cortex-M85 | |
Cortex-R4 | |
Cortex-R5 | |
Cortex-R8 | |
SC000 (M0 secure) | |
SC300 (M3 secure) | |
RISC-V | |
RV32 | |
RV64 | |
Microchip PIC32 | |
PIC32MX | |
PIC32MZ | |
SiLabs 8051 | |
EFM8 | |
Renesas RX | |
RX110 | |
RX111 | |
RX140 | |
RX210 | |
RX21A | |
RX220 | |
RX610 | |
RX621 | |
RX62G | |
RX62G | |
RX62N | |
RX62T | |
RX630 | |
RX631 | |
RX63N | |
RX63T | |
RX64M | |
RX660 | |
Cadence | |
HiFi 1 | |
HiFi 3 | |
HiFi 3z | |
HiFi 4 | |
Fusion F1 |