Difference between revisions of "Toshiba TMPM4K"
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*The device uses normal Cortex-M reset, no special handling necessary, like described [[J-Link_Reset_Strategies#Type_0:_Normal | here]]. |
*The device uses normal Cortex-M reset, no special handling necessary, like described [[J-Link_Reset_Strategies#Type_0:_Normal | here]]. |
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==Evaluation Boards== |
==Evaluation Boards== |
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| + | *[[Toshiba_SBK-M4KN] | Toshiba SBK-M4KN] |
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| − | *[[WikiTemplateEvalBoard|[SiliconVendor] [EvalBoardName]]] |
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==Example Application== |
==Example Application== |
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+ | *[[Toshiba_SBK-M4KN#Example_Project] | Toshiba SBK-M4KN] |
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Revision as of 17:14, 10 January 2024
The Toshiba TMPM4K are Cortex-M4 based microprocessors.
Contents
Flash Banks
Internal Flash
| Flash Bank | Base address | Size | J-Link Support |
|---|---|---|---|
| Code Flash | 0x00000000 | Up to 512 KB | 
|
| Data Flash | 0x30000000 | 32 KB |
|
Watchdog Handling
- The Watchdog is disabled during flash programming.
Device Specific Handling
Reset
- The device uses normal Cortex-M reset, no special handling necessary, like described here.
Evaluation Boards
- [[Toshiba_SBK-M4KN] | Toshiba SBK-M4KN]
Example Application
- [[Toshiba_SBK-M4KN#Example_Project] | Toshiba SBK-M4KN]
