e-peas EDMS105N EVK

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This article describes specifics for the e-peas EDMS105N_EVK evaluation board.
[PICTURE OF BOARD] 450px

Preparing for J-Link

  • Connect the J-Link to the following Pins:
    • GND: CN4.1
    • VTref: CN5.1
    • SWDIO: JP7.3
    • SWCLK_ JP7.1
    • RESET: JP7.5
  • Power the board via S1.
  • Verify the Connection with e.g. J-Link Commander. The output should look as follows:

Epeas MDNS105N-xxyP connect.png

Example Project

The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the e-peas EDMS105N_EVK.
It is a simple Hello World sample linked into the internal flash.

SETUP

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