i.MXRT1060

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Revision as of 09:58, 31 August 2022 by Matthias (talk | contribs) (Flash Programming)
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This article coverst the NXP i.MXRT1060 family devices. As for all i.MXRT10xx devices, JTAG is not active per default. Instead SWD can be used. To activate JTAG on this target device eFuses must be set. For more information see the corresponding target reference manual.

Flash Programming

NXP's iMXRT106x family features a Cortex-M7 core without internal flash but with support for QSPI and HyperFlash through a so called FLEXSPI controller. NXP's official evaluation board, the MIMXRT1050 EVK is shipped with a 512Mbit Hyper Flash device by default. Alternatively, a QSPI flash can be mounted but several board modifications (removing the hyper flash, adding resistors, etc...) are required. As both flashes are accessed through the same memory mapped address space, either the HyperFlash or the QSPI flash RAMCode needs to be used for memory accesses to this area. Please find below further information how to select the desired flash loader. Official flash programming support has been added in J-Link software version V6.31d.

Resetting the device in the init steps may lead to problems when programming in standalone mode.

Requirements

  • Min. J-Link software version V6.40 (release) is required. Later versions will also work. Earlier versions do not support flash programming on this device.

In order to be able to program a i.MXRT106x device, we expect that the first 0x10000 bytes of the RAM are configured to execute instructions from. The purpose of the RAM banks can be configured through the FlexRAM-controller. In case you have a different configuration of the RAM banks, which is not compatible with our assumption, please contact us.

Available flash loaders

J-Link comes with multiple selectable FLEXSPI flashloaders for i.MXRT1060 devices. There are several options to select a different loader than the default one.

Loader name Pin configuration Notes
HyperFlash FLEXSPIB_DATA03 = GPIO_SD_B1_00
FLEXSPIB_DATA02 = GPIO_SD_B1_01
FLEXSPIB_DATA01 = GPIO_SD_B1_02
FLEXSPIB_DATA00 = GPIO_SD_B1_03
FLEXSPIB_SCLK = GPIO_SD_B1_04
FLEXSPIA_DQS = GPIO_SD_B1_05
FLEXSPIA_SS0_B = GPIO_SD_B1_06
FLEXSPIA_SCLK = GPIO_SD_B1_07
FLEXSPIA_DATA00 = GPIO_SD_B1_08
FLEXSPIA_DATA01 = GPIO_SD_B1_09
FLEXSPIA_DATA02 = GPIO_SD_B1_10
FLEXSPIA_DATA03 = GPIO_SD_B1_11
Default loader
QSPI FLEXSPIB_DATA03 = GPIO_SD_B1_00
FLEXSPIB_DATA02 = GPIO_SD_B1_01
FLEXSPIB_DATA01 = GPIO_SD_B1_02
FLEXSPIB_DATA00 = GPIO_SD_B1_03
FLEXSPIB_SCLK = GPIO_SD_B1_04
FLEXSPIA_DQS = GPIO_SD_B1_05
FLEXSPIA_SS0_B = GPIO_SD_B1_06
FLEXSPIA_SCLK = GPIO_SD_B1_07
FLEXSPIA_DATA00 = GPIO_SD_B1_08
FLEXSPIA_DATA01 = GPIO_SD_B1_09
FLEXSPIA_DATA02 = GPIO_SD_B1_10
FLEXSPIA_DATA03 = GPIO_SD_B1_11
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NOTE: Please note that several hardware modifications needs to be done on the evaluation board to enable HyperFlash programming / booting from HyperFlash. For further information regarding this, please refer to NXPs board user manual.