Difference between revisions of "NXP i.MX 8XLite"

From SEGGER Wiki
Jump to: navigation, search
(Created page with "__TOC__ The '''NXP i.MX 8''' is an embedded multi-core processor consisting of one Cortex-M4, two Cortex-A53. == Debugging == J-Link supports debugging for the Cortex-M4. Du...")
(No difference)

Revision as of 17:36, 21 March 2024

The NXP i.MX 8 is an embedded multi-core processor consisting of one Cortex-M4, two Cortex-A53.

Debugging

J-Link supports debugging for the Cortex-M4. During connect the M4 is set to execute an endless loop at 0x1FFE0000 (TCML RAM) and afterwards halted.

Reset

J-Link currently does not support device reset.