NXP i.MX 8

From SEGGER Wiki
Revision as of 17:30, 21 March 2024 by Artjom.Kister (talk | contribs)
Jump to: navigation, search

The NXP i.MX8 is a embedded multicore processor consisting of two Cortex-M4, four Cortex-A53 and two Cortex-A72.

Debugging

J-Link supports debugging for the Cortex-M4. During connect the M4 is set to execute an endless loop at 0x1FFE0000 (TCML RAM) and afterwards halted.

Reset

J-Link currently does not support device reset.