Difference between revisions of "NXP i.MX 8"
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Revision as of 10:56, 28 March 2024
Contents
The NXP i.MX 8 is an embedded multi-core processor consisting of two Cortex-M4, four Cortex-A53 and two Cortex-A72.
Debugging
J-Link supports debugging for the Cortex-M4. During connect the M4 is set to execute an endless loop at 0x1FFE0000 (TCML RAM) and afterwards halted.
Reset
J-Link currently does not support device reset.
