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8051 is a term for Intel's MCS-51 single chip microcontroller (MCU). It was one of the first microcontrollers ever. The instruction set is still in use in a lot of modern designs.


Speed depends very much on the implementation. The original 8051 needed 12 clock cycles per machine cyle. Most instructions need one or 2 machine cycles, so that at 12MHz, 1 million single-cycle insgtructions or 500,000 two-cycle instructions could be executed. Modern implementations are usually "pipelined" and execute a single instruction in a single cycle, so they are much faster than the original design.

Memory architecture

Internal RAM (IRAM)

Internal RAM can be adressed by 8 bits (@R0, @R1 or immediate-8), so can be up 256 bytes. Not a whole lot by today's standard. In addition to that, only the @R0 and @R1 adressing modes can actually access the entire IRAM. For direct access (Address is the second byte of the instruction), only the lower half from 0x00 to 0x7F can accessed. If bit 7 of the address is set, the SFRs are accessed instead.

Special fuction registers

The special function registers(SFRs) overlap the address space of the IRAM. Direct accesses to the upper half (0x80 - 0xFF) access the SFRs instead of the IRAM. Indirect read or write operations (using @R0 or @R1) access IRAM.


XRAM used to be "external RAM". In most modern designs, the external RAM is actually also internal. The reason for having 2 types of internal RAM are set by the CPU architecture. IRAM is limited to 256 bytes and can not be expanded. IRAM at the same time is also necessary, as it is used for stack. The solution to have more RAM is to have on-chip XRAM. XRAM can be adressed via the 16-bit DPTR, so a regular 8051 CPU can address up to 64kB of XRAM.

Program Memory (PMEM)


The classic 8051 has the following registers:

  • PC - 16-bit Program Counter. Contains the address to read the next instruction from
  • A - Accumulator. 8-bit register used by most instructions. Memory mapped to 0xE0.
  • B - 8-bit registers used as extension to A for multiply and divide. Memory mapped to 0xF0.
  • SP - 8-bit Stack pointer.
  • DP - Data Pointer. 16-bit register used by instructions accessing PMEM and XRAM.Memory mapped to 0x82-83
  • PSW - Program Status Word. 8-bit register containing various flags.
  • R0-R7 - 4 banks of 8 8-bit general purpose registers. Memory mapped to 0x0 - 0x1f, where the first bank uses the first 8 bytes from 0..7. The selected bank is chosen by the 2 RSB bits in the PSW.

Instruction set


Most 8051 devices are programmed in C or assembler today. There are good compilers available for the architecture, that allow optimizing for the architecture using keywords to define memory areas and types of pointers. It is next to impossible to write generic C-Code for the 8051, since a pointer needs to be of a particular type, defining which memory area to access. If a pointer is untyped (generic), access is typically done in a subroutine, slowing down the code execution significantly.


On tradidional 8051 devices, debugging was limited or impossible. The only option was to use a "bond-out chip" and in-circuit emulator in the early days. Today's 8051-based microcontroller typically have a debug interface. For some of these, such as Silabs EFM8 devices, SEGGER J-Link can and is typically used. https://www.segger.com/products/debug-probes/j-link/technology/cpus-and-devices/silabs-efm8-c8051-support/