9-pin JTAG/SWD connector

From SEGGER Wiki
Jump to: navigation, search

This article describes the J-Link 9-pin JTAG/SWD connector, available on J-Link Edu Mini.

Pinout

9-pin JTAG/SWD connector pinout


Some target boards only provide a 9-pin JTAG/SWD connector for Cortex-M. For these devices SEGGER provides a 20-pin -> 9-pin Cortex-M adapter.
The J-Link EDU mini also comes with a 9-pin Cortex-M connector.

PIN SIGNAL TYPE Description
1 VTref Input This is the target reference voltage.
It is used to check if the target has power, to create the logic-level reference for the input comparators and to control the output logic levels to the target. It is normally fed from VDD of the target board and must not have a series resistor.
2 SWDIO / TMS I/O / Output
  • SWDIO: (Single) bi-directional data pin.
  • TMS: JTAG mode set input of target CPU.
    This pin should be pulled up on the target. Typically connected to TMS of the target CPU.
4 SWCLK / TCK Output
  • SWCLK: Clock signal to target CPU.
  • TCK: JTAG clock signal to target CPU.
It is recommended that this pin is pulled to a defined state of the target board.
6 SWO / TDO Input
  • SWO: Serial Wire Output trace port. (Optional, not required for SWD communication)
  • JTAG data output from target CPU. Typically connected to TDO of the target CPU.
--- --- --- This pin (normally pin 7) is not existent on the 9-pin JTAG/SWD connector.
8 NC / TDI NC / Output
  • SWD: Not used. J-Link will ignore the signal on this pin when using SWD.
  • TDI: JTAG data input of target CPU. It is recommended that this pin is pulled to a defined state on the target board. Typically connected to TDI of the target CPU.
9 NC(TRST) NC By default, TRST is not connected, but the Cortex-M Adapter comes with a solder bridge (NR1) which allows TRST to be connected to pin 9 of the Cortex-M adapter.
10 nRESET I/O Target CPU reset signal. Typically connected to the RESET pin of the target CPU, which is typically called "nRST", "nRESET" or "RESET". This signal is an active low signal.
3, 5 GND Ground GND pins connected to GND in J-Link.
They should also be connected to GND in the target system.
Retrieved from "https://wiki.segger.com/index.php?title=9-pin_JTAG/SWD_connector&oldid=17377"