Syntacore SCR1 SDK Arty
This article describes specifics for the Syntacore SCR1 Arty SDK.
Please note that a current J-Link model is needed for RISC-V support: Overview
J-Link software V6.44 or later is required to support the Syntacore SCR1. Older versions will not work.
Please refer to the Syntacore SCR1 article to see what sample projects are available.
Preparing for J-Link
Initially, the Arty board does not run any Syntacore SCR1 core, so the FPGA on it needs to be configured first. For instructions how to do this, please refer to
The Syntacore SCR1 Arty SDK does not come with a standard debug connector but populates the debug JTAG signals on a custom connector. Therefore, it needs to be manually wired in case J-Link shall be connected to it.
In the following, it is described how the pins of connector JD on the ARTY board needs to be wired to J-Link. All pins of the J-Link side refer to the standard 0.1" 20-pin connector of J-Link.
|Pin JD (ARTY)||Pin J-Link||Description|
Note: The pins on the JD connector are numbered as follows: