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The TMS570Lx series features a so called ICEPick which requires a special connect sequence. This sequence is executed by default by the J-Link DLL if the proper device (e.g. TMS570LS3137) is selected. How to select the correct device: https://wiki.segger.com/Selecting_the_correct_device

By default, the J-Link DLL assumes one TMS570Lx device in the JTAG-chain (TDI -> TMS570 -> TDO).

Different JTAG-chain

If a different JTAG-chain is used, a adapted J-Link Script File is required which contains the updated configuration. Please find below two script files for a setup where two TMS570Lx devices are chained in a JTAG-chain (TDI -> TMS570L (#0) -> TMS570L (#1) -> TDO).

If your JTAG-chain configuration differs from the default and the above one, please get in contact with SEGGER.

RAM initialization on connect

The TMS570Lx device series comes with an ECC protected RAM. To make sure that no ECC errors are generated when reading from the ECC protected RAM region, the J-Link DLL has to initialize this region before reading it in order to make sure that the ECC is valid. Prior the initialization is issued, a reset of the MCU is performed in order to bring the device into a proper state and to make sure that hardware units like for example DMAs are halted during the RAM init. The actual ECC init is performed by using the Memory Hardware Initialization of the MCU.

Whereas this RAM init is required for most setups, there are some setups where this could cause issues (e.g. when attaching to a running session). In order to prevent the J-Link DLL from executing the RAM initialization, an command string must be passed to the J-Link DLL. This can be done by using a J-Link script file. Further information regarding the J-Link script file can be found in the J-Link User Manual (UM08001).

Please note, that the script file has been tested with version V6.12b of the J-Link software and documentation package.


RTT is supported on the TI TMS570Lx device series since J-Link software version V6.82. With older versions RTT will not work.

Tracing on TMS570LC series

This section describes how to get started with trace on the TI TMS570LC MCUs. This section assumes that there is already a basic knowledge about trace in general (what is trace, what different implementations of trace are there, etc.). If this is not the case, we recommend to read Trace chapter in the J-Link User Manual (UM08001).

  • The sample projects come with a pre-configured project file for Ozone that runs out-of-the box.
  • The following sample project is designed to be used with J-Trace PRO Cortex for streaming trace and Ozone to demonstrate streaming trace.
  • In order to rebuild the sample project, SEGGER Embedded Studio can be used.
  • All examples are shipped with a compiled .JLinkScriptfile (.pex), should you need the original source, please get in touch with SEGGER directly via our support system: https://www.segger.com/ticket/.

Tracing on TI TMS570LC4357

Minimum requirements

In order to use trace on the TI TMS570LC4357 MCU devices, the following minimum requirements have to be met:

  • J-Link software version V6.84a or later
  • Ozone V3.20e or later (if streaming trace and / or the sample project from below shall be used)
  • J-Trace PRO for Cortex HW version V2.0 or later for streaming trace

To rebuild the project our IDE Embedded Studio can be used. The recommended version to rebuild the projects is V6.30. But the examples are all prebuild and work out-of-the box with Ozone, so rebuilding is not necessary.

Streaming trace

The project has been tested with the minimum requirements mentioned above and a custom board. But the project is designed to run on any TMS570LC4357 hardware that has the trace pins connected to the trace header.

Example project: TI_TMS570LC_Trace.zip

Tested Hardware

The project was tested on custom hardware we received from a customer. Unfortunately there is no eval board available that has the trace pins connected to a trace header. For design guidelines we recommend contacting TI support.