Difference between revisions of "Infineon EVAL PMG1 B1 DRP"
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'''[PICTURE OF BOARD]''' |
'''[PICTURE OF BOARD]''' |
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[[File:VENDOR_BOARDNAME.jpg|450px]] |
[[File:VENDOR_BOARDNAME.jpg|450px]] |
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== Preparing for J-Link == |
== Preparing for J-Link == |
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| − | *Connect the J-Link to ...... |
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*Connect the J-Link to this pins: |
*Connect the J-Link to this pins: |
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====SETUP==== |
====SETUP==== |
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*Embedded Studio: V7.20 |
*Embedded Studio: V7.20 |
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| − | *Hardware: |
+ | *Hardware: Infineon EVAL PMG1 B1 DRP |
| − | *Link: [[File: |
+ | *Link: [[File:Infineon_CYPM1116_TestProject_ES_V720.zip]] |
Revision as of 12:42, 13 May 2024
This article describes specifics for the Infineon EVAL PMG1 B1 DRP evaluation board.
[PICTURE OF BOARD]
450px
Preparing for J-Link
- Connect the J-Link to this pins:
| J-Link Pin | Connector | Pin | Name |
|---|---|---|---|
| VTref | J4 | 1 | B1_VDDD |
| GND | J4 | 2 | GND |
| TMS/SWDIO | J4 | 9 | SWDIO |
| TCK/SWCLK | J4 | 7 | SWDCLK |
| RESET | J4 | 5 | RESET |
- Power the board via J1 9...22V.
- Verify the Connection with e.g. J-Link Commander. The output should look as follows:
Example Project
The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the [SiliconVendor] [EvalBoardName].
It is a simple Hello World sample linked into the internal flash.
SETUP
- Embedded Studio: V7.20
- Hardware: Infineon EVAL PMG1 B1 DRP
- Link: File:Infineon CYPM1116 TestProject ES V720.zip
