Difference between revisions of "Triple Core Debugging on LPC4367 with Embedded Studio"
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+ | #REDIRECT [[NXP_LPC43xx_series]] |
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− | __TOC__ |
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− | This article describes how to setup triple core debugging with SEGGER Embedded Studio. |
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− | == Required soft- and hardware == |
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− | The sample project has been tested with the following components: |
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− | *J-Link |
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− | *NXP LPCXpresso43xx (OM13088) evaluation board |
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− | *J-Link software beta version V6.01f or later |
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− | *SEGGER Embedded Studio V3.10 |
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− | == Running the sample project == |
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− | Every core increments a 32bit counter in a shared shared memory area (0x10001F00 - 0x10001FFF). |
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− | To run the sample project at first compile and start the project M4 within LPC4367_Multicore with Embedded Studio. Then open a second instance of Embedded Studio with the project M0APP within LPC4367_Multicore. Compile and start the second project. Then open a third instance of Embedded Studio with the project M0SUB within LPC4367_Multicore. Compile and start the third project. |
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− | Now you can independently run, halt and step all three cores. Please note that starting the Cortex-M4 will issue a system reset and affect all cores, so the Cortex-M4 always has to be started before the Cortex-M0 cores. |
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− | == Included files == |
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− | {| class="wikitable" |
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− | |- |
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− | ! Filename !! Content |
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− | |- |
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− | | '''Readme.txt''' || Readme file with instructions for debugging |
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− | | '''LPC4367_Multicore\LPC4367_Multicore.emProject''' || Project file with M0/M4 projects |
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− | | '''LPC4367_Multicore\M0APP\*''' || Cortex M0 APP core project source files |
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− | |- |
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− | | '''LPC4367_Multicore\M0SUB\*''' || Cortex M0 SUB core project source files |
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− | |- |
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− | | '''LPC4367_Multicore\M4\*''' || Cortex M4 core project source files |
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− | |- |
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− | |} |
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− | == NXP LPC4350 Embedded Studio Projects == |
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− | [[File:LPC4367_TripleCore_Debug_SES.zip]] |
Latest revision as of 10:24, 16 May 2019
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