Difference between revisions of "CVA BlueWhale CVM011x"

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(Created page with "__TOC__ The CVA BlueWhale CVM011x are Cortex-M0+ based MCUs. ==Internal Flash== ===Supported Regions=== The internal flash is divided into program flash and data flash: *Pro...")
 
 
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[[Category:Device families]]
 
__TOC__
  
__TOC__
 
The CVA BlueWhale CVM011x are Cortex-M0+ based MCUs.
  
The CVA BlueWhale CVM011x are Cortex-M0+ based MCUs.
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| 0x00000400 || { backdoor keys[63:0] }
  
| 0x00000400 || { backdoor keys[63:0] }
 
|-
  
|-
−
| 0x00000408 || { FTFC_DFPRONT[27:0], Reserved[3:0], FTFC_DFPRONT[7:9], FTFC_EFPRONT[7:0], Reserved[15:0] }
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| 0x00000408 || { FTFC_PFPRONT[27:0], Reserved[3:0], FTFC_DFPRONT[7:9], FTFC_EFPRONT[7:0], Reserved[15:0] }
 
|-
  
|-
 
| 0x00000410 || { Reserved[3:0], FTFC_FSEC[5:4], FTFC_FSEC[7:6], Reserved[55:0] }
  
| 0x00000410 || { Reserved[3:0], FTFC_FSEC[5:4], FTFC_FSEC[7:6], Reserved[55:0] }
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| 0x00000420 || User defined Info
  
| 0x00000420 || User defined Info
 
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|}
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To avoid accidental writes of the option bytes, CVM011x devices have two flash loader options to choose from.
  
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The 'Default' loader checks, whether the option byte area is affected by new data.
  
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In this case programming or erasing returns an error.
  
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By executing chip erase the option bytes will also be erased and the FTFC_FSEC SECURE bits will be set to unsecure.
  
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The 'With option bytes' loader does not check for any overlap of the option byte area.
  
   
 
{{Note|1=
  
{{Note|1=
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Writing a value of 0xFF inside FTFC_FSEC will read-protect the CVM011x . In order to keep the device unprotected you have to write the correct key value to FTFC_FSEC.
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Writing 0xFF to FTFC_FSEC will read-protect the CVM011x . In order to keep the device unprotected you have to write the correct key value to FTFC_FSEC.
 
* FTFC_FSEC = 0xF2
  
* FTFC_FSEC = 0xF2
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}}
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===Connect Specifics===
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==== Up to V7.88n ====
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* If the FTFC_FSEC SECURE bit is set, J-Link software will show a popup with the option to unsecure the device via a mass-erase.
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* If any flash area is write protected via the FTFC_xFPRONT bits, J-Link software will show a popup with the option to unprotect all areas via a mass-erase.
  +
  +
==== Starting from V7.88n ====
  +
* If the FTFC_FSEC SECURE bit is set, J-Link software will show a popup with the option to unsecure the device via a mass-erase.
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* If any flash area is write protected via the FTFC_xFPRONT bits, J-Link software will show an information popup without any options.
  +
{{Note|1=
  +
Writing 0x01 to FTFC_PFPRONT will cause the Cfg Field to be protected.
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After a power-cycle this can only be recovered by an external mass erase via MDM-AP.
  +
Find more information in the corresponding device reference manual.
 
}}
  
}}
   

Latest revision as of 14:52, 15 May 2024

The CVA BlueWhale CVM011x are Cortex-M0+ based MCUs.

Internal Flash

Supported Regions

The internal flash is divided into program flash and data flash:

  • Program flash storage area starting at 0x00000000 with up to 224KB
  • Program flash configuration field area starting at 0x00000400 with 1KB
  • Data flash storage area starting at 0x10000000 with 32KB

For now, the J-Link supports the program flash storage and data flash storage. Specific handling of the program flash configuration fields is not supported.

Option Byte Programming

The CVM011x series devices provides a program flash configuration field area (option bytes) which allow some "permanent" configuration as well as readout protection for the device. The option bytes become effective after a reset, or, if the read protection is set while a debugger is still connected through JTAG/SWD, become effective after a power-on-reset.

The option byte area consists of multiple configuration fields. After a reset, the values within these fields will be written into the corresponding registers. All complementary bytes are automatically set when writing the option bytes.

CVM011x
Address Register mapping
0x00000400 { backdoor keys[63:0] }
0x00000408 { FTFC_PFPRONT[27:0], Reserved[3:0], FTFC_DFPRONT[7:9], FTFC_EFPRONT[7:0], Reserved[15:0] }
0x00000410 { Reserved[3:0], FTFC_FSEC[5:4], FTFC_FSEC[7:6], Reserved[55:0] }
0x00000418 { FTFC_FSEC[1:0], Reserved[61:0] }
0x00000420 User defined Info
Note:

Writing 0xFF to FTFC_FSEC will read-protect the CVM011x . In order to keep the device unprotected you have to write the correct key value to FTFC_FSEC.

  • FTFC_FSEC = 0xF2

Connect Specifics

Up to V7.88n

  • If the FTFC_FSEC SECURE bit is set, J-Link software will show a popup with the option to unsecure the device via a mass-erase.
  • If any flash area is write protected via the FTFC_xFPRONT bits, J-Link software will show a popup with the option to unprotect all areas via a mass-erase.

Starting from V7.88n

  • If the FTFC_FSEC SECURE bit is set, J-Link software will show a popup with the option to unsecure the device via a mass-erase.
  • If any flash area is write protected via the FTFC_xFPRONT bits, J-Link software will show an information popup without any options.
Note:

Writing 0x01 to FTFC_PFPRONT will cause the Cfg Field to be protected. After a power-cycle this can only be recovered by an external mass erase via MDM-AP.

Find more information in the corresponding device reference manual.

Reset

No device specific reset is necessary. The normal Cortex-M reset is performed.

See here for more information: https://wiki.segger.com/J-Link_Reset_Strategies#Type_0:_Normal

Evaluation Boards


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