Difference between revisions of "Hilscher netX90"
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*Hardware: Hilscher NXHX 90-JTAG evalboard (silicon revision 1916) |
*Hardware: Hilscher NXHX 90-JTAG evalboard (silicon revision 1916) |
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*Link: [[File:Hilscher_NetX90_ComCore_TestProject_ES_V550d.zip]] |
*Link: [[File:Hilscher_NetX90_ComCore_TestProject_ES_V550d.zip]] |
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+ | *Link: [[File:Hilscher_NetX90_AppCore_TestProject_ES_V550d.zip]] |
Revision as of 16:52, 30 September 2021
The netX90 is the newest addition to Hilscher’s SoC family that provides a superior solution with an unmatched protocol flexibility for a variety of industrial slave or device applications in the process and factory automation
Debug Support
The J-Link support for the Hilscher netX90 includes both Cortex-M4 cores, Net-Core and App-Core
On-Chip Memory Regions
The internal flash is divided into 3 different regions for the Net-Core:
Instance Name | Size (kilo bytes) | Memory region |
---|---|---|
Bank 0 | 512 | 0x00100000 - 0x00180000 |
Bank 1 | 512 | 0x00180000 - 0x20000000 |
Bank 2 | 512 | 0x00200000 - 0x00280000 |
The App-Core has only access to internal flash bank 2:
Instance Name | Size (kilo bytes) | Memory region |
---|---|---|
Bank 2 | 512 | 0x00200000 - 0x00280000 |
Trace Support
- Hilscher netX90 tracing: https://wiki.segger.com/Tracing_on_Hilscher_netX90
Example Application
The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the Hilscher NetX90 evalboard. It is a simple Hello World sample linked into the internal flash. SETUP
- J-Link software: V7.55d
- Embedded Studio: V5.50d
- Hardware: Hilscher NXHX 90-JTAG evalboard (silicon revision 1916)
- Link: File:Hilscher NetX90 ComCore TestProject ES V550d.zip
- Link: File:Hilscher NetX90 AppCore TestProject ES V550d.zip