Difference between revisions of "Infineon WLC"
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==Device Specific Handling== |
==Device Specific Handling== |
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===Connect=== |
===Connect=== |
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− | The connect sequence |
+ | The connect sequence WLC devices is very time critical and is performed from the J-Link's side directly in either one of these 2 modes:<br> |
+ | * Reset mode: <br> |
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− | * Reset mode: <br> J-Link toggles the XRES line and then sends SWD commands.<br>Reset mode is not supported by PMG1-S0 devices because they do not have an XRES pin.<br> |
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+ | J-Link toggles the XRES line and then sends SWD commands.<br> |
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− | * Power Cycle mode:<br> J-Link powers on the target and then starts sending the SWD commands.<br>Therefore the target device needs to be supplied via Pin 19 of the J-Link and Pin 1 also needs to be connected to pin 19 of the J-Link.<br>Make sure to set VSupply (pin 19) correctly before connecting it to the target board.<br>This is the only mode supported by PMG1-S0 devices.<br> |
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+ | * Power Cycle mode:<br> |
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+ | J-Link powers on the target and then starts sending the SWD commands.<br> |
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+ | Therefore the target device needs to be supplied via Pin 19 of the J-Link and Pin 1 also needs to be connected to pin 19 of the J-Link.<br> |
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+ | Make sure to set VSupply (pin 19) correctly before connecting it to the target board.<br> |
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A device with reconfigured SWD pins runs automatically the acquire sequence to get control of the SWD pins for debugging back.<br> |
A device with reconfigured SWD pins runs automatically the acquire sequence to get control of the SWD pins for debugging back.<br> |
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Revision as of 10:32, 30 May 2024
The Infineon WLC is a family of wireless charging transmitter IC MCUs with Arm® Cortex®-M0 CPU.
Contents
Flash Banks
Internal Flash
Flash Bank | Base address | Size | J-Link Support |
---|---|---|---|
Internal Flash | 0x00000000 | 128 KB | ![]() |
Watchdog Handling
- The device has a watchdog WDT.
- The watchdog is not fed during flash programming.
Device Specific Handling
Connect
The connect sequence WLC devices is very time critical and is performed from the J-Link's side directly in either one of these 2 modes:
- Reset mode:
J-Link toggles the XRES line and then sends SWD commands.
- Power Cycle mode:
J-Link powers on the target and then starts sending the SWD commands.
Therefore the target device needs to be supplied via Pin 19 of the J-Link and Pin 1 also needs to be connected to pin 19 of the J-Link.
Make sure to set VSupply (pin 19) correctly before connecting it to the target board.
A device with reconfigured SWD pins runs automatically the acquire sequence to get control of the SWD pins for debugging back.
Reset
- The device uses custom reset via AIRCR.SYSRESETREQ and halt at application entry point.
Limitations
Attach
Attach is not supported because the J-Link resets the device on connect.
Evaluation Boards
- EVAL_PMG1_B1_DRP
- CY7110EZ-PD PMG1-S0 Prototyping kit
- CY7110EZ-PD PMG1-S1 Prototyping kit
- CY7110EZ-PD PMG1-S2 Prototyping kit