Difference between revisions of "DA14583 series"
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+ | The ARM CoreLink SSE-200 is a prototyping platform from ARM that allows prototyping of Cortex-M33 based devices on the [[MPS3 | ARM MPS3 board]]. |
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+ | It incorporates a dual-core Cortex-M33, lots of internal RAM (> 2 MB) and QSPI flash. |
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+ | = Reset pin = |
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+ | The Dialog Semiconductor DA14583 series devices have a reset pin called RST. In contrast to almost all other devices supported by J-Link, the RST pin on this series is an active HIGH pin. Usually reset pin is active LOW. By hardware design, the reset pin on J-Link is also active LOW. In order to use J-Link with the DA14583 series devices, please make sure that RST of the target device is '''not''' connected to the reset pin controlled by J-Link or make sure that an inverter is between. |
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+ | As J-Link usually uses the AIRCR register of the Cortex-M cores to issue a reset via software and the DA14583 is a Cortex-M0 based device, the RST pin of this device is usually not needed by J-Link to do proper debugging. |
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+ | <references/> |
Revision as of 15:19, 15 August 2018
Contents
The ARM CoreLink SSE-200 is a prototyping platform from ARM that allows prototyping of Cortex-M33 based devices on the ARM MPS3 board. It incorporates a dual-core Cortex-M33, lots of internal RAM (> 2 MB) and QSPI flash.
Reset pin
The Dialog Semiconductor DA14583 series devices have a reset pin called RST. In contrast to almost all other devices supported by J-Link, the RST pin on this series is an active HIGH pin. Usually reset pin is active LOW. By hardware design, the reset pin on J-Link is also active LOW. In order to use J-Link with the DA14583 series devices, please make sure that RST of the target device is not connected to the reset pin controlled by J-Link or make sure that an inverter is between.
As J-Link usually uses the AIRCR register of the Cortex-M cores to issue a reset via software and the DA14583 is a Cortex-M0 based device, the RST pin of this device is usually not needed by J-Link to do proper debugging.