Infineon PMG1
The Infineon PMG1 is a family of high-voltage USB PD MCUs with Arm® Cortex®-M0/Cortex-M0+ CPU.
Contents
Flash Banks
Internal Flash
Subfamily | Flash Bank | Base address | Size | J-Link Support |
---|---|---|---|---|
PMG1-B1 | Internal Flash | 0x00000000 | 128 KB | |
PMG1-S0 | Internal Flash | 0x00000000 | 64 KB |
Watchdog Handling
- The device has a watchdog WDT.
- The watchdog is not fed during flash programming.
Device Specific Handling
Connect
The connect sequence of PMG1 devices is very time critical and is performed from the J-Link's side directly in either one of these 2 modes:
- Reset mode:
- J-Link toggles the XRES line and then sends SWD commands.
- Reset mode is not supported by PMG1-S0 devices because they do not have an XRES pin.
- Power Cycle mode:
- J-Link powers on the target and then starts sending the SWD commands.
- Therefore the target device needs to be supplied via Pin 19 of the J-Link and Pin 1 also needs to be connected to pin 19 of the J-Link.
- Make sure to set VSupply (pin 19) correctly before connecting it to the target board.
- This is the only mode supported by PMG1-S0 devices.
- J-Link powers on the target and then starts sending the SWD commands.
A device with reconfigured SWD pins runs automatically the acquire sequence to get control of the SWD pins for debugging back.
Reset
- The device uses custom reset via AIRCR.SYSRESETREQ and halt at application entry point.
Limitations
Attach
Attach is not supported because the J-Link resets the device on connect.