Difference between revisions of "ArteryTek AT-START-F421"
m (Torben.scharping moved page Artery AT-START-F421 to ArteryTek AT-START-F421) |
|||
(3 intermediate revisions by the same user not shown) | |||
Line 1: | Line 1: | ||
__TOC__ |
__TOC__ |
||
− | This article describes specifics for the |
+ | This article describes specifics for the ArteryTek AT-START-F421 evaluation board.<br> |
[[File:Artery_AT-START-F421_AT32F421C8T7_board.jpg|450px]] |
[[File:Artery_AT-START-F421_AT32F421C8T7_board.jpg|450px]] |
||
Line 19: | Line 19: | ||
| RESET || J2 || 7 || NRST |
| RESET || J2 || 7 || NRST |
||
|} |
|} |
||
− | *Power the board via |
+ | *Power the board via CH4. |
* Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows: |
* Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows: |
||
[[File:Artery_AT-START-F421_AT32F421C8T7_connect.png|400px]] |
[[File:Artery_AT-START-F421_AT32F421C8T7_connect.png|400px]] |
||
== Example Project== |
== Example Project== |
||
− | The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the |
+ | The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the ArteryTek AT-START-F425.<br> |
It is a simple Hello World sample linked into the internal flash.<br> |
It is a simple Hello World sample linked into the internal flash.<br> |
||
====SETUP==== |
====SETUP==== |
||
− | *J-Link software: V7. |
+ | *J-Link software: V7.94h |
*Embedded Studio: V7.20 |
*Embedded Studio: V7.20 |
||
− | *Hardware: |
+ | *Hardware: ArteryTek AT-START-F421 |
*Link: [[File:Artery_AT-START-F421_AT32F421C8T7_TestProject_ES_7V20.zip]] |
*Link: [[File:Artery_AT-START-F421_AT32F421C8T7_TestProject_ES_7V20.zip]] |
Latest revision as of 16:39, 8 February 2024
This article describes specifics for the ArteryTek AT-START-F421 evaluation board.
Preparing for J-Link
- Connect the J-Link to this pins:
J-Link Pin | Connector | Pin | Name |
---|---|---|---|
VTref | J1 | 24 | VDD |
GND | J1 | 23 | GND |
SWDIO | J1 | 10 | PA13 |
SWCLK | J1 | 13 | PA14 |
RESET | J2 | 7 | NRST |
- Power the board via CH4.
- Verify the Connection with e.g. J-Link Commander. The output should look as follows:
Example Project
The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the ArteryTek AT-START-F425.
It is a simple Hello World sample linked into the internal flash.
SETUP
- J-Link software: V7.94h
- Embedded Studio: V7.20
- Hardware: ArteryTek AT-START-F421
- Link: File:Artery AT-START-F421 AT32F421C8T7 TestProject ES 7V20.zip