Difference between revisions of "CoreLink SSE-200 Subsystem for MPS3"
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+ | The ARM CoreLink SSE-200 is a prototyping platform from ARM that allows prototyping of Cortex-M33 based devices on the [[MPS3 | ARM MPS3 board]]. |
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+ | It incorporates a dual-core Cortex-M33, lots of internal RAM (> 2 MiB) and QSPI flash. |
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+ | |||
+ | = J-Link support = |
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+ | J-Link supports the ARM CoreLink SSE-200 prototyping platform since the following J-Link software versions: |
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+ | * V6.33h (beta) or later ([https://www.segger.com/downloads/jlink/#J-LinkSoftwareAndDocumentationPackBeta Download latest beta]) |
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+ | * V6.34 (release) or later ([https://www.segger.com/downloads/jlink/#J-LinkSoftwareAndDocumentationPack Download latest release]) |
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+ | |||
+ | = Core topology = |
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+ | The cores are named as follows: |
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+ | |||
+ | {| class="wikitable" |
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+ | !Core name |
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+ | !Description |
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+ | |- |
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+ | |Cortex-M33 (core 0) |
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+ | |Main core that device boots from by default |
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+ | |- |
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+ | |Cortex-M33 (core 1) |
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+ | |Secondary core that is not booted by default on reset release |
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+ | |} |
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+ | |||
+ | == J-Link device selection == |
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+ | The following device names are available for J-Link: |
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+ | |||
+ | {| class="wikitable" |
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+ | !Device name |
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+ | !Function |
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+ | |- |
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+ | |SSE-200-MPS3 |
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+ | |Connects to core 0 |
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+ | |- |
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+ | |SSE-200-MPS3_M33_0 |
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+ | |Connects to core 0 |
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+ | |- |
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+ | |SSE-200-MPS3_M33_1 |
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+ | |Connects to core 1. Core 1 is enabled (released from reset) automatically by J-Link, if necessary |
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+ | |} |
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+ | |||
+ | = Example projects = |
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+ | There are sample projects available that demonstrate how to use J-Link with the ARM CoreLink SSE-200 prototyping platform. |
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+ | |||
+ | == SEGGER Embedded Studio (multi-core) == |
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+ | The sample project for SEGGER Embedded Studio is a RAM based project and also demonstrates multi-core debugging. |
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+ | The sample is actually split into 2 projects: |
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+ | * [[Media:ARM_SSE-200-MPS3_MPS3_LEDBlinkCore0_ES.zip | ARM_SSE-200-MPS3_MPS3_LEDBlinkCore0_ES.zip]] |
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+ | * [[Media:ARM_SSE-200-MPS3_MPS3_LEDBlinkCore1_ES.zip | ARM_SSE-200-MPS3_MPS3_LEDBlinkCore1_ES.zip]] |
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+ | |||
+ | ''' ARM_SSE-200-MPS3_MPS3_LEDBlinkCore0_ES ''' |
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+ | |||
+ | Loaded into internal SRAM and executed by core 0. Controls LED1 and LED2 on the MPS3 board. LED1 is always toggled, LED2 is toggled as long as core 1 is running its application and sending commands to core 0 |
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+ | |||
+ | ''' ARM_SSE-200-MPS3_MPS3_LEDBlinkCore1_ES ''' |
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+ | |||
+ | Loaded into internal SRAM and executed by core 1. Sends commands to core 0 that instruct the main application to toggle LED2 |
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+ | |||
+ | === Usage === |
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+ | * Start SEGGER Embedded Studio twice |
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+ | * Open ARM_SSE-200-MPS3_MPS3_LEDBlinkCore0_ES and ARM_SSE-200-MPS3_MPS3_LEDBlinkCore1_ES accordingly |
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+ | * Start debug session with project for core 0 |
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+ | * Let CPU run as soon as main() has hit |
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+ | * Start debug session with project for core 1 |
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+ | * Let CPU run as soon as main() has hit |
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+ | * LED1 and LED2 will blink |
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+ | * Now halt core 1 (issue halt request in debug session for core 1) |
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+ | * LED2 stops blinking, LED1 continues to blink |
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+ | |||
+ | === Requirements === |
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+ | The following are the min. requirements to run the example project: |
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+ | * SEGGER Embedded Studio V3.40 or later |
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+ | * J-Link software V6.33h or later. (Install after Embedded Studio and let J-Link installer update the Embedded Studio installation) |
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+ | * [[MPS3 | ARM MPS3 board]] |
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+ | |||
+ | <references/> |
Latest revision as of 09:26, 27 May 2021
Contents
The ARM CoreLink SSE-200 is a prototyping platform from ARM that allows prototyping of Cortex-M33 based devices on the ARM MPS3 board. It incorporates a dual-core Cortex-M33, lots of internal RAM (> 2 MiB) and QSPI flash.
J-Link support
J-Link supports the ARM CoreLink SSE-200 prototyping platform since the following J-Link software versions:
- V6.33h (beta) or later (Download latest beta)
- V6.34 (release) or later (Download latest release)
Core topology
The cores are named as follows:
Core name | Description |
---|---|
Cortex-M33 (core 0) | Main core that device boots from by default |
Cortex-M33 (core 1) | Secondary core that is not booted by default on reset release |
J-Link device selection
The following device names are available for J-Link:
Device name | Function |
---|---|
SSE-200-MPS3 | Connects to core 0 |
SSE-200-MPS3_M33_0 | Connects to core 0 |
SSE-200-MPS3_M33_1 | Connects to core 1. Core 1 is enabled (released from reset) automatically by J-Link, if necessary |
Example projects
There are sample projects available that demonstrate how to use J-Link with the ARM CoreLink SSE-200 prototyping platform.
SEGGER Embedded Studio (multi-core)
The sample project for SEGGER Embedded Studio is a RAM based project and also demonstrates multi-core debugging. The sample is actually split into 2 projects:
ARM_SSE-200-MPS3_MPS3_LEDBlinkCore0_ES
Loaded into internal SRAM and executed by core 0. Controls LED1 and LED2 on the MPS3 board. LED1 is always toggled, LED2 is toggled as long as core 1 is running its application and sending commands to core 0
ARM_SSE-200-MPS3_MPS3_LEDBlinkCore1_ES
Loaded into internal SRAM and executed by core 1. Sends commands to core 0 that instruct the main application to toggle LED2
Usage
- Start SEGGER Embedded Studio twice
- Open ARM_SSE-200-MPS3_MPS3_LEDBlinkCore0_ES and ARM_SSE-200-MPS3_MPS3_LEDBlinkCore1_ES accordingly
- Start debug session with project for core 0
- Let CPU run as soon as main() has hit
- Start debug session with project for core 1
- Let CPU run as soon as main() has hit
- LED1 and LED2 will blink
- Now halt core 1 (issue halt request in debug session for core 1)
- LED2 stops blinking, LED1 continues to blink
Requirements
The following are the min. requirements to run the example project:
- SEGGER Embedded Studio V3.40 or later
- J-Link software V6.33h or later. (Install after Embedded Studio and let J-Link installer update the Embedded Studio installation)
- ARM MPS3 board