Difference between revisions of "GigaDevice GD32A5"

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__TOC__
 
 
The GD32A50x series are 32-bit general-purpose microcontrollers based on the Arm®
 
The GD32A50x series are 32-bit general-purpose microcontrollers based on the Arm®
Cortex®-M33 processor.<br>
+
Cortex®-M33 processor.
  +
__TOC__
  +
  +
==Flash Banks==
  +
===Internal Flash===
  +
{| class="seggertable"
  +
|-
  +
! Flash Bank || Base address !! Size || J-Link Support
  +
|-
  +
| Main flash Bank 0 || 0x08000000 || Up to 256 KB || style="text-align:center;"| {{YES}}
  +
  +
|-
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| Main flash Bank 1 || 0x08300000 || 128 KB || style="text-align:center;"| {{YES}}
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|}
  +
 
==Internal ECC RAM==
 
==Internal ECC RAM==
 
{| class="seggertable"
 
{| class="seggertable"

Revision as of 11:48, 15 February 2024

The GD32A50x series are 32-bit general-purpose microcontrollers based on the Arm® Cortex®-M33 processor.

Flash Banks

Internal Flash

Flash Bank Base address Size J-Link Support
Main flash Bank 0 0x08000000 Up to 256 KB YES.png
Main flash Bank 1 0x08300000 128 KB YES.png

Internal ECC RAM

Device StartAddr Size
GD32A503xB 0x20000000 24Kb
GD32A503xC 0x20000000 32Kb
GD32A503xD 0x20000000 48Kb
  *** Additional information ***

In order to prevent errors when reading first time, the DLL intialises the first 24Kb of RAM starting at 0x2000 0000.

Supported Flash Banks

Internal Flash

Device StartAddr Size J-Link Support
GD32A503xB 0x08000000 128Kb YES.png
GD32A503xC 0x08000000 256Kb YES.png
GD32A503xD 0x08000000 384Kb YES.png

Option Byte

Device StartAddr Size J-Link Support
GD32A503xx 0x1FFFF800 24 Byte YES.png

Reset

The device uses normal reset, no special handling necessary.

Minimum requirements

  • J-Link software V7.82b or later

Evaluation Boards

Example Application