GigaDevice GD32A5

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The GD32A50x series are 32-bit general-purpose microcontrollers based on the Arm® Cortex®-M33 processor.

Flash Banks

Internal Flash

Flash Bank Base address Size J-Link Support
Main flash Bank 0 0x08000000 Up to 256 KB YES.png
Main flash Bank 1 0x08040000 128 KB YES.png
Data flash 0x08800000 up to 64 KB YES.png
Option Byte 0 0x1FFFF800 24 B YES.png
Option Byte 1 0x40022068 4 B YES.png
OTP Bytes 0x1FFF7000 1 KB NO.png


Note:
After changing Option Byte 1, a power on reset has to be performed.

ECC RAM

In order to prevent errors when reading first time, the DLL initializes the first 24Kb of RAM starting at 0x2000 0000.

Watchdog Handling

  • The device does have 2 watchdogs.
  • The watchdogs are fed during flash programming.

Device Specific Handling

Connect

  • On Connect, protection level is checked. For further information regarding this, please click here.

Reset

  • The device uses normal Cortex-M reset, no special handling necessary, like described here.

Evaluation Boards

Example Application