Difference between revisions of "GigaDevice GD32L23"
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==Evaluation Boards== |
==Evaluation Boards== |
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| + | *[[GigaDevice_GD32L233C-START | GigaDevice GD32L233C-START]] |
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*[[GigaDevice_GD32L233R-EVAL | GigaDevice GD32L233R-EVAL]] |
*[[GigaDevice_GD32L233R-EVAL | GigaDevice GD32L233R-EVAL]] |
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==Example Application== |
==Example Application== |
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| + | *[[GigaDevice_GD32L233C-START#Example_Project | GigaDevice GD32L233C-START]] |
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*[[GigaDevice_GD32L233R-EVAL#Example_Project | GigaDevice GD32L233R-EVAL]] |
*[[GigaDevice_GD32L233R-EVAL#Example_Project | GigaDevice GD32L233R-EVAL]] |
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| − | |||
| − | |||
| − | |||
| − | __TOC__ |
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| − | The GigaDevice GD32L23 series are general-purpose Cortex-M23 based 32-bit microcontrollers. |
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| − | ==Internal Flash== |
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| − | ===Supported Regions=== |
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| − | The size and sectorization of the internal flash differs depending on the exact device.<br> |
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| − | {| class="wikitable" |
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| − | |- |
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| − | ! Device !! Size (KiB) || Memory region |
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| − | |- |
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| − | | GD32L233C8T6 || 64 || 0x00000000 - 0x0000FFFF |
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| − | |- |
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| − | | GD32L233CBT6 || 128 || 0x00000000 - 0x0001FFFF |
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| − | |- |
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| − | | GD32L233CCT6 || 256 || 0x00000000 - 0x0003FFFF |
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| − | |- |
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| − | | GD32L233K8T6 || 64 || 0x00000000 - 0x0000FFFF |
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| − | |- |
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| − | | GD32L233K8Q6 || 64 || 0x00000000 - 0x0000FFFF |
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| − | |- |
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| − | | GD32L233KBT6 || 128 || 0x00000000 - 0x0001FFFF |
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| − | |- |
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| − | | GD32L233KBQ6 || 128 || 0x00000000 - 0x0001FFFF |
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| − | |- |
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| − | | GD32L233R8T6 || 64 || 0x00000000 - 0x0000FFFF |
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| − | |- |
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| − | | GD32L233RBT6 || 128 || 0x00000000 - 0x0001FFFF |
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| − | |- |
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| − | | GD32L233RCT6 || 256 || 0x00000000 - 0x0003FFFF |
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| − | |} |
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| − | |||
| − | ==Evaluation Boards== |
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| − | * GigaDevice GD32L233R-EVAL evaluation board: https://wiki.segger.com/GigaDevice_GD32L233R-EVAL |
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| − | |||
| − | ==Example Application== |
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| − | * GigaDevice GD32L233R-EVAL evaluation board: https://wiki.segger.com/GigaDevice_GD32L233R-EVAL#Example_Project |
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Latest revision as of 18:02, 27 February 2024
The GigaDevice GD32L23 series are 32-bit general-purpose microcontrollers based on the ARM Cortex-M23 processor.
Contents
Flash Banks
Internal Flash
| Flash Bank | Base address | Size | J-Link Support |
|---|---|---|---|
| Main flash | 0x08000000 | Up to 256 KB | 
|
| Option Bytes | 0x1FFFF800 | 16 B |
|
| OTP Bytes | 0x1FFF7000 | 512 B | 
|
Watchdog Handling
- The device does have 2 watchdogs, FWDGT and WWDGT.
- The WWDGT watchdog is fed during flash programming.
Device Specific Handling
Connect
- On Connect, protection level is checked. For further information regarding this, please click here.
Reset
- The device uses normal Cortex-M reset, no special handling necessary, like described here.
