Difference between revisions of "Hilscher netX90"
Latest revision as of 12:44, 23 September 2022
The netX90 is the newest addition to Hilscher’s SoC family that provides a superior solution with an unmatched protocol flexibility for a variety of industrial slave or device applications in the process and factory automation.
The J-Link support for the Hilscher netX90 includes both Cortex-M4 cores, COM core and APP core.
On-Chip Memory Regions
The internal flash is divided into 2 different regions for the COM core and 1 shared region for APP and COM core. All flash banks are supported by J-Link.
|Instance Name||Core access||Size||Memory range|
|Bank 0||COM||512 KB||0x00100000 - 0x0017FFFF|
|Bank 1||COM||512 KB||0x00180000 - 0x001FFFFF|
|Bank 2||COM & APP||512 KB||0x00200000 - 0x0027FFFF|
The following two reset types are supported:
In both cases, the rest will make sure that the device is halted after bootloader execution is completed and before the user application is started.
For the app core, no device specific reset is implemented. Thus the default reset is used: J-Link_Reset_Strategies#Type_0:_Normal
The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the Hilscher NetX90 evalboard. It is a simple Hello World sample linked into the internal flash.
- J-Link software: V7.55d
- Embedded Studio: V5.50d
- Hardware: Hilscher NXHX 90-JTAG evalboard (silicon revision 1916)
- Link: File:Hilscher NetX90 ComCore TestProject ES V550d.zip
- Link: File:Hilscher NetX90 AppCore TestProject ES V550d.zip