Difference between revisions of "Interrupt Vector Table"

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[[Category:Knowledge Base]]
 
[[Category:Knowledge Base]]
 
An Interrupt Vector Table is a table (an array) pointing to an array of [[Interrupt Service Routine]]s.
 
An Interrupt Vector Table is a table (an array) pointing to an array of [[Interrupt Service Routine]]s.
Typically, the Interrupt Vector Table is a maintained manually by the programmer (in an ASM File, such as
+
Typically, the Interrupt Vector Table is a maintained manually by the programmer (in an ASM file, such as
 
the startup code).
 
the startup code).
 
Depending on the architecture, that might also be done automatically (by declaring a routine as
 
Depending on the architecture, that might also be done automatically (by declaring a routine as
an interrupt service handler (ISR), and preceeding it by a pragma directive).
+
an interrupt service handler, and preceeding it by a pragma directive).
 
The Interrupt Vector Table can be fixed (such as for ARM Cortex-M0 CPUs) or variable, in which
 
The Interrupt Vector Table can be fixed (such as for ARM Cortex-M0 CPUs) or variable, in which
 
case some sort of "Interrupt Vector Table base register" exists.
 
case some sort of "Interrupt Vector Table base register" exists.
This typically allows mapping the Interrupt vector table to RAM, so that it can also be modified by
+
This typically allows mapping the Interrupt vector table to [[RAM]], so that it can also be modified by
 
the running program.
 
the running program.

Latest revision as of 00:49, 7 June 2019

An Interrupt Vector Table is a table (an array) pointing to an array of Interrupt Service Routines. Typically, the Interrupt Vector Table is a maintained manually by the programmer (in an ASM file, such as the startup code). Depending on the architecture, that might also be done automatically (by declaring a routine as an interrupt service handler, and preceeding it by a pragma directive). The Interrupt Vector Table can be fixed (such as for ARM Cortex-M0 CPUs) or variable, in which case some sort of "Interrupt Vector Table base register" exists. This typically allows mapping the Interrupt vector table to RAM, so that it can also be modified by the running program.