J-Link zoned memory access

In many MCUs, there are different memory views available via a debugger / debug probe. Some examples are:

• Core view (same view as the CPU / core has)
• Uncached view
• Cached view
• ...

ARM Cortex-A/R/M specific memory zones

On ARM Cortex-A/R/M based MCUs, besides the "core view" there are also so-called MEM-AP views available.
A MEM-AP is a DMA-like piece of hardware but with its own 32-bit (4 GiB) address space (AXI-APs have 48-bit).
MEM-APs are used for various purposes:

• APB-AP to have a 32-bit address space to place debug registers of the core into and so isolate them from the application/core, so they cannot access them by accident.
• AHB-AP to have a DMA-like access to system memory (flash, RAM, peripheral registers, ...) without involving the MPU / MMU / core. Allows for example background memory accesses to RAM without halting the core and so making use of features like SEGGER HSS and SEGGER RTT.
• AXI-AP to have a DMA-like access to system memory (flash, RAM, peripheral registers, ...) without involving the MPU / MMU / core. Allows for example background memory accesses to RAM without halting the core and so making use of features like SEGGER HSS and SEGGER RTT.

When selecting a known device (not just the core but the actual manufacturer + device name) in the J-Link software, the zones are usually already predefined.
When working on new device support or some custom device J-Link does not know anything about, the AP map needs to be setup, to make J-Link aware of the available zones.
The AP map may be setup via a J-Link script file:

/*********************************************************************
*
*       ConfigTargetSettings()
*/
int ConfigTargetSettings(void) {
  //
  // Setup AP map:
  //   AP[0]  APB-AP  Connected to authentication module
  //   AP[1]  APB-AP  Debug AP. Connected to debug registers etc. of the cores
  //   AP[2]  AXI-AP  Connected to system memory. May be used for RTT / HSS as well as MMU independent peripheral access
  //
  // AP address in DAP space can be retrieved from MCU vendor. For CoreSight SoC-400 and earlier, APAddr = APIndex << 24.
  // This is no longer the case for CoreSight SoC-600 and later.
  // Note that "index" inside this command is the index inside the AP map of the J-Link software. It is not related to any index on the hardware/chip side.
  //
  JLINK_ExecCommand("CORESIGHT_AddAP = Index=0 Type=APB-AP Addr=0x00000000");
  JLINK_ExecCommand("CORESIGHT_AddAP = Index=1 Type=APB-AP Addr=0x01000000");
  JLINK_ExecCommand("CORESIGHT_AddAP = Index=2 Type=AXI-AP Addr=0x02000000");
  JLINK_ExecCommand("CORESIGHT_SetIndexAPBAPToUse = 1");             // Define which APB-AP to use for debugging (the one that is connected to the core)
  JLINK_ExecCommand("CORESIGHT_SetIndexBGMemAPToUse = 2");           // Use AXI-AP for RTT/HSS
  JLINK_ExecCommand("CORESIGHT_SetCoreBaseAddr = 0x80410000");       // Debug registers of CPU0 in APB-AP address space
  JLINK_ExecCommand("CORESIGHT_SetCSCTICoreBaseAddr = 0x80420000");  // CTI of CPU0. Needed for ARMv8-A/R based cores to halt + resume the core
  return 0;
}

SiLabs EFM8 specific memory zones

TBD

Accessing memory zones

J-Link Commander

When connecting to a device, J-Link Commander will print the available zones, if any besides "default" are available:

...
Memory zones:
  Zone: "Default" Description: Default access mode
  Zone: "AP0" Description: MEM-AP (APB-AP)
  Zone: "AP1" Description: MEM-AP (APB-AP)
  Zone: "AP2" Description: MEM-AP (AXI-AP)
Cortex-R52 identified.
J-Link>

The zones can be used by the memory commands:

• mem / mem32 / ...
• w1 / w2 / w4 / w8

Taking the example from above, issuing a 64-bit item write to address 0x2000_0000 via the AXI-AP, the following command may be used:

w8 AP2:0x20000000 0x1122334455667788

To read 256 (0x100) bytes @ 0x2000_0000 via the AXI-AP, the following command may be used:

mem AP2:0x20000000, 100

Omitting the zone part accesses the "default" zone.

Ozone

TBD