Difference between revisions of "NXP KW45"
(→Evaluation Boards) |
(→Example Application) |
||
Line 25: | Line 25: | ||
==Example Application== |
==Example Application== |
||
− | *NXP X-KW45B41Z evaluation board: |
+ | *NXP X-KW45B41Z evaluation board: https://wiki.segger.com/NXP_X-KW45B41Z#Example_Project |
Revision as of 17:14, 9 January 2023
The NXP KW45 are multicore devices composed of one Cortex-M33 and one Cortex-M3. Currently J-Link supports the Cortex-M33.
Internal Flash
Supported Regions
The internal flash is divided into two different regions: Non-Secure/Secure flash and NBU flash.
Flash bank | Base address | Size (KB) |
---|---|---|
Non-secure flash | 0x00000000 | KW45x41x5x: 512 KW45x41x8x: 1024 |
Secure flash | 0x10000000 | KW45x41x5x: 512 KW45x41x8x: 1024 |
NBU flash | 0x48800000 | 256 |
Reset
J-Link supports a reset for the following use cases:
- No valid flash image in non-secure flash region
- Valid flash region in non-secure flash region
Other cases (e.g. valid flash image in secure flash region) are currently not supported.
Evaluation Boards
- NXP
- NXP X-KW45B41Z evaluation board: https://wiki.segger.com/NXP_X-KW45B41Z
Example Application
- NXP X-KW45B41Z evaluation board: https://wiki.segger.com/NXP_X-KW45B41Z#Example_Project