NXP MCXA18

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The NXP MCXA18 are single core ARM Cortex-M33 microprocessors.

Flash Banks

Internal Flash

Flash Bank Base address Size J-Link Support
Internal Flash 0x00000000 up to 1024 KB YES.png

ECC Flash

  • Device has ECC Flash, but no special handling required.

ECC RAM

  • Device has 8KB ECC RAM named SRAM A0, can be used when LPCAC is switched off

Watchdog Handling

  • The device has 2 watchdogs WWDT and CDOG.
  • The watchdog WWDT is fed during flash programming.
  • No handling for CDOG implemented.

Device Specific Handling

Reset

  • The J-Link performs a device specific reset sequence. SRAM and Flash is set to RWX.

Attach

Attach is supported.

Evaluation Boards

NXP MCX-A14X-EVK evaluation board

Example Application

NXP MCX-A14X-EVK evaluation board

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