Difference between revisions of "NXP MCXN11"
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==Evaluation Boards== |
==Evaluation Boards== |
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==Example Application== |
==Example Application== |
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+ | *[[NXP_FRDM-MCXN236#Example_Project|NXP FRDM-MCXN236 evaluation board]] |
Latest revision as of 13:49, 9 February 2024
Contents
The NXP MCXN11 are single core Arm Cortex-M33 microprocessors.
Flash Banks
Internal Flash
| Flash Bank | Base address | Size | J-Link Support |
|---|---|---|---|
| Main flash (NS) | 0x00000000 | Up to 2 MB | 
|
| Main flash (S) | 0x10000000 | Up to 2 MB |
|
ECC RAM
- Device has ECC RAM with various settings.
Device Specific Handling
Init/Setup
- 64KB RAMC @ 0x20010000 is used, if it set to ECC_ENABLE, it is initialized.
- Enables debugging
Reset
- Device specific reset is performed.
Attach
- Attach is supported if RAMC is not set to ECC_ENABLE.
