Difference between revisions of "NXP PNEV76FAMA"
(Created page with "__TOC__ This article describes specifics for the NXP PNEV76FAMA evaluation board. It can be used to test & verify PN76 device support with J-Link. File:NXP_PNEV76FAMA.jpeg...") |
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__TOC__ |
__TOC__ |
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| − | This article describes specifics for the NXP PNEV76FAMA evaluation board. It can be used to test & verify PN76 device support with J-Link. |
+ | This article describes specifics for the NXP PNEV76FAMA evaluation board. It can be used to test & verify [[NXP PN76 |PN76]] device support with J-Link. |
[[File:NXP_PNEV76FAMA.jpeg|450px]] |
[[File:NXP_PNEV76FAMA.jpeg|450px]] |
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*For board REV D remove jumper J20 3-4 and connect pin 4 of J20 to any ground e.g. TP4. Keep J25 open. |
*For board REV D remove jumper J20 3-4 and connect pin 4 of J20 to any ground e.g. TP4. Keep J25 open. |
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*Connect the J-Link to the debug connector (J21) |
*Connect the J-Link to the debug connector (J21) |
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| − | *Power the board via |
+ | *Power the board via USB (J5) |
| + | |||
| − | *Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows: |
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| + | Afterwards, the board should look similar to this:<br> |
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| + | [[File:NXP_PNEV76FAMA_Wired.PNG|400px]] |
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| + | |||
| + | |||
| + | Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows: |
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[[File:NXP_PNEV76FAMA_Connect.PNG|400px]] |
[[File:NXP_PNEV76FAMA_Connect.PNG|400px]] |
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== Example Project== |
== Example Project== |
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| − | The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the NXP |
+ | The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the NXP PNEV76FAMA. It is a simple Hello World sample linked into the internal flash. |
====SETUP==== |
====SETUP==== |
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*J-Link software: V7.65b |
*J-Link software: V7.65b |
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Latest revision as of 14:52, 28 April 2022
This article describes specifics for the NXP PNEV76FAMA evaluation board. It can be used to test & verify PN76 device support with J-Link.
Minimum requirements
- J-Link software V7.65b or later
Preparing for J-Link
- For board REV D remove jumper J20 3-4 and connect pin 4 of J20 to any ground e.g. TP4. Keep J25 open.
- Connect the J-Link to the debug connector (J21)
- Power the board via USB (J5)
Afterwards, the board should look similar to this:
Verify the Connection with e.g. J-Link Commander. The output should look as follows:
Example Project
The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the NXP PNEV76FAMA. It is a simple Hello World sample linked into the internal flash.
SETUP
- J-Link software: V7.65b
- Embedded Studio: V6.22
- Hardware: NXP PNEV76FAMA
- Link: File:NXP PNEV76FAMA ES V622.zip
