Difference between revisions of "Nations N32G03x"
| (One intermediate revision by one other user not shown) | |||
| Line 1: | Line 1: | ||
| + | [[Category:Device families]] |
||
__TOC__ |
__TOC__ |
||
The '''Nations N32G032x''' are general-purpose microcontroller based on the Arm® Cortex®-M0 core. |
The '''Nations N32G032x''' are general-purpose microcontroller based on the Arm® Cortex®-M0 core. |
||
| Line 15: | Line 16: | ||
===Reset=== |
===Reset=== |
||
*The devices uses normal Cortex-M reset, no special handling necessary, like described [[J-Link_Reset_Strategies#Type_0:_Normal | here]]. |
*The devices uses normal Cortex-M reset, no special handling necessary, like described [[J-Link_Reset_Strategies#Type_0:_Normal | here]]. |
||
| − | |||
==Evaluation Boards== |
==Evaluation Boards== |
||
Latest revision as of 14:54, 15 May 2024
Contents
The Nations N32G032x are general-purpose microcontroller based on the Arm® Cortex®-M0 core.
Flash Banks
Internal Flash
| Flash Bank | Base address | Size | J-Link Support |
|---|---|---|---|
| Main Flash | 0x08000000 | Up to 64 KB | 
|
| Option Byte | 0x1FFFF600 | 16 B |
|
Device Specific Handling
Reset
- The devices uses normal Cortex-M reset, no special handling necessary, like described here.
Evaluation Boards
- Nations N32G030C8L7_STB evaluation board: https://wiki.segger.com/Nations_N32G030C8L7_STB
- Nations N32G031C8L7_STB evaluation board: https://wiki.segger.com/Nations_N32G031C8L7_STB
- Nations N32G032R8L7_STB evaluation board: https://wiki.segger.com/Nations_N32G032R8L7_STB
Example Application
- Nations N32G030C8L7_STB evaluation board: https://wiki.segger.com/Nations_N32G030C8L7_STB#Example_Project
- Nations N32G031C8L7_STB evaluation board: https://wiki.segger.com/Nations_N32G031C8L7_STB#Example_Project
- Nations N32G032R8L7_STB evaluation board: https://wiki.segger.com/Nations_N32G032R8L7_STB#Example_Project
