Nuvoton M071x

The [SiliconVendor] [DeviceFamily] are [SHORT_DESCRIPTION]

Flash Banks

Internal Flash

Device	Base address	Size	J-Link Support
[DEVICE]	[BANK_BASE_ADDRESS]	[FLASH_SIZE] KB	/

ECC Flash [OPTIONAL]

• Describe ECC Flash restriction here.

QSPI Flash

QSPI flash programming requires special handling compared to internal flash. For more information about this, please see the QSPI Flash Programming Support article.
J-Link supports multiple pin configurations for [DEVICE]. The default loader is marked in bold.

Device	Base address	Maximum size	Supported pin configuration
[DEVICE]	[BANK_BASE_ADDRESS]	[MAX_SPI_FLASH_SIZE] MB	[LOADER_NAME] [LOADER_NAME] [LOADER_NAME]

ECC RAM [OPTIONAL]

• Describe ECC RAM restriction here.

Vector Table Remap [OPTIONAL]

• Describe Vector Table Remap here..

Device Specifc Handling

Reset

• The devices uses normal Cortex-M reset, no special handling necessary, like described here.
• The devices uses Cortex-M Core reset, no special handling necessary, like described here.
• The devices uses Cortex-M Rest Pin, no special handling necessary, like described here.
• The device uses custom reset:.....

Evaluation Boards

• [SiliconVendor] [EvalBoardName] evaluation board: http://techwiki.segger.local/WikiTemplateEvalBoard

Example Application

• [SiliconVendor] [EvalBoardName] evaluation board: http://techwiki.segger.local/WikiTemplateEvalBoard#Example_Project