Difference between revisions of "RTT Ramcode Sample for Cortex-M0+ (Keil MDK)"

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= Minimum requirements =
 
= Minimum requirements =
In order to use ETB trace on the ATMEL ATSAMD21 devices, the following minimum requirements have to be met:
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In order to use RTT on the ATMEL ATSAMD21 devices, the following minimum requirements have to be met:
 
* J-Link software version V6.44g or later
 
* J-Link software version V6.44g or later
 
* µVision V5.24.2.0 or later (if the sample project from below shall be used)
 
* µVision V5.24.2.0 or later (if the sample project from below shall be used)
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The following sample project is designed to be used with J-Link and Keil MDK to demonstrate RTT. The project has been tested with the minimum requirements mentioned above and a SAMD21 XPlained Pro evalboard. The sample project comes with a pre-configured project for Keil MDK that runs out-of-the box.
 
The following sample project is designed to be used with J-Link and Keil MDK to demonstrate RTT. The project has been tested with the minimum requirements mentioned above and a SAMD21 XPlained Pro evalboard. The sample project comes with a pre-configured project for Keil MDK that runs out-of-the box.
   
[[Media:Atmel_AT91SAMD2_ETB_Trace.zip | Atmel_AT91SAMD2_ETB_Trace.zip ]]
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[[Media:CortexM0+_RAM_RTT_Sample.zip | CortexM0+_RAM_RTT_Sample.zip ]]
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= Manual =
  +
*After downloading and unzipping the project, open it with Keil µVision V5.24.2.0 or later.
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*Remark: When using another Cortex M0+ device with different RAM sections, adapt the RAM sections accordingly in the Keil project settings:
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<br>[[File:CortexM0+ RTT RAMSettings.PNG]]
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*Build(F7) the project and start debugging by clicking on the Debug button (Ctrl + F5)
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*Start RTT Viewer and connect with the following settings:
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[[File:CortexM0+_RTT_Settings.PNG|RTT Viewer Settings]]
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*Running the ramcode (F5) in Keil results in the following output in RTT viewer:<br><br>
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[[File:CortexM0+ RTT Output.PNG|RTT Viewer output]]
   
 
= Tested Hardware =
 
= Tested Hardware =
[[File:SAMA5D2_XPlained_Ultra.jpg|left|thumb|SAMA5D2 XPlained Ultra]]
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[[File:Atmel_SAMD21Xplained.jpg|left|thumb|SAMD21 XPlained Pro]]

Latest revision as of 10:48, 28 January 2021

This article describes how to get started with RTT within RAM on a Cortex-M0+ device. This article assumes that there is already a basic knowledge about RTT in general (what is RTT, etc.). If this is not the case, we recommend to read RTT chapter in the J-Link User Manual (UM08001).

Minimum requirements

In order to use RTT on the ATMEL ATSAMD21 devices, the following minimum requirements have to be met:

  • J-Link software version V6.44g or later
  • µVision V5.24.2.0 or later (if the sample project from below shall be used)
  • J-Link Plus HW version V10.1 or later

Sample project

RTT Ramcode

The following sample project is designed to be used with J-Link and Keil MDK to demonstrate RTT. The project has been tested with the minimum requirements mentioned above and a SAMD21 XPlained Pro evalboard. The sample project comes with a pre-configured project for Keil MDK that runs out-of-the box.

CortexM0+_RAM_RTT_Sample.zip

Manual

  • After downloading and unzipping the project, open it with Keil µVision V5.24.2.0 or later.
  • Remark: When using another Cortex M0+ device with different RAM sections, adapt the RAM sections accordingly in the Keil project settings:


CortexM0+ RTT RAMSettings.PNG

  • Build(F7) the project and start debugging by clicking on the Debug button (Ctrl + F5)
  • Start RTT Viewer and connect with the following settings:

RTT Viewer Settings

  • Running the ramcode (F5) in Keil results in the following output in RTT viewer:

RTT Viewer output

Tested Hardware

SAMD21 XPlained Pro