RZ/G1

The Renesas RZ/G1 is a dual core device. There are two variants of the RZ/G1:

• RZ/G1E dual core Cortex-A7
• RZ/G1M dual core Cortex-A15

By default, only one core (main core) is running which needs to release the second core from reset from within the application running on the main core.

Due to design limitations of the device, the second core cannot be easily enabled independently from the main core, via J-Link.

Dual core debugging on the RZ/G1

In order to debug both cores on the RZ/G1, the following needs to be done:

1. Start a debug session for the main core, which uses the appropriate ConnectCore0 script
2. Once the debug session has been started, it will have the second core enabled for debugging
3. Start a debug session for the second core, which uses the appropriate ConnectCore1 script
4. From now on, both cores can be debugged in parallel in both debugger instances

Script Files and sample projects

Below some sample script files for the dual core debugging as well as some sample projects for emIDE (V2.20 or later) and IAR EWARM (V7.40 or later) are available for download

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