Difference between revisions of "Renesas ASSP EASY"
(→Limitations) |
(→Connect) |
||
| Line 24: | Line 24: | ||
==Device Specific Handling== |
==Device Specific Handling== |
||
===Connect=== |
===Connect=== |
||
| − | *On Connect, the RAM is initialized |
+ | *On Connect, the RAM is initialized. |
| + | |||
===Reset=== |
===Reset=== |
||
*The device uses normal RISC-V reset, no special handling necessary, like described [[J-Link_Reset_Strategies#Type_0:_Normal_6 | here]]. |
*The device uses normal RISC-V reset, no special handling necessary, like described [[J-Link_Reset_Strategies#Type_0:_Normal_6 | here]]. |
||
Revision as of 17:34, 18 March 2024
The Renesas ASSP easy are RISC-V based microcontrollers.
Contents
Flash Banks
Internal Flash
| Flash Bank | Base address | Size | J-Link Support |
|---|---|---|---|
| Code Flash | 0x00000000 | up to 128 KB | 
|
| Config Flash | 0x01010008 | up tp 44 B |
|
| Data Flash | 0x40100000 | up to 4 KB |
|
ECC RAM
- Device has ECC RAM which has to be initialized before use.
Watchdog Handling
- The device has 2 watchdogs.
- Both watchdogs are fed during flash programming.
Device Specific Handling
Connect
- On Connect, the RAM is initialized.
Reset
- The device uses normal RISC-V reset, no special handling necessary, like described here.
Limitations
Attach
Attach is not supported by default because the J-Link initializes certain RAM regions by default.
