Difference between revisions of "Renesas DA1470x"
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The '''Renesas DA1470''' devices are a family of multi-core Cortex-M33/Cortex-M0 based microcontrollers. |
The '''Renesas DA1470''' devices are a family of multi-core Cortex-M33/Cortex-M0 based microcontrollers. |
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! Device !! Base address !! Maximum size !! Supported |
! Device !! Base address !! Maximum size !! Supported |
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| − | | DA14701 || 0x38000000 || 128 MB || {{YES}} |
+ | | DA14701 || 0x38000000 || 128 MB ||scope="col" style="text-align:center" | {{YES}} |
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| − | | DA14705 || 0x38000000 || 128 MB || {{YES}} |
+ | | DA14705 || 0x38000000 || 128 MB ||scope="col" style="text-align:center" | {{YES}} |
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| − | | DA14706 || 0x38000000 || 128 MB || {{YES}} |
+ | | DA14706 || 0x38000000 || 128 MB ||scope="col" style="text-align:center" | {{YES}} |
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| − | | DA14708 || 0x38000000 || 128 MB || {{YES}} |
+ | | DA14708 || 0x38000000 || 128 MB ||scope="col" style="text-align:center" | {{YES}} |
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==Watchdog== |
==Watchdog== |
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Device has a system watchdog. It is automatically frozen when Cortex-M33 is in debug mode. |
Device has a system watchdog. It is automatically frozen when Cortex-M33 is in debug mode. |
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| − | ==Multi-Core Support |
+ | ==Multi-Core Support == |
Before proceeding with this article, please check out the generic article regarding Multi-Core debugging [[Multi-Core_Debugging | here]]. |
Before proceeding with this article, please check out the generic article regarding Multi-Core debugging [[Multi-Core_Debugging | here]]. |
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The DA1470 device include a Cortex-M33 and Cortex-M0. The debug related multi-core behavior of the J-Link is described for each core: |
The DA1470 device include a Cortex-M33 and Cortex-M0. The debug related multi-core behavior of the J-Link is described for each core: |
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==Evaluation Boards== |
==Evaluation Boards== |
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| − | *Renesas DA1470x DevKit evaluation board: |
+ | *Renesas DA1470x DevKit evaluation board: https://wiki.segger.com/Renesas_DA1470x_DevKit |
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| − | ==Example Application== |
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| − | *Renesas DA1470x DevKit evaluation board: |
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Latest revision as of 13:26, 15 May 2024
Contents
The Renesas DA1470 devices are a family of multi-core Cortex-M33/Cortex-M0 based microcontrollers.
Flash Banks
QSPI Flash
QSPI flash programming requires special handling compared to internal flash. For more information about this, please see the QSPI Flash Programming Support article.
| Device | Base address | Maximum size | Supported |
|---|---|---|---|
| DA14701 | 0x38000000 | 128 MB | 
|
| DA14705 | 0x38000000 | 128 MB |
|
| DA14706 | 0x38000000 | 128 MB |
|
| DA14708 | 0x38000000 | 128 MB |
|
Watchdog
Device has a system watchdog. It is automatically frozen when Cortex-M33 is in debug mode.
Multi-Core Support
Before proceeding with this article, please check out the generic article regarding Multi-Core debugging here. The DA1470 device include a Cortex-M33 and Cortex-M0. The debug related multi-core behavior of the J-Link is described for each core:
Cortex-M33
Init/Setup
- J-Link performs a default Cortex-M33 init sequence. No special handling is necessary.
Reset
- The devices uses normal Cortex-M reset, no special handling necessary, like described here.
Cortex-M0
J-Link does not support Cortex-M0.
Evaluation Boards
- Renesas DA1470x DevKit evaluation board: https://wiki.segger.com/Renesas_DA1470x_DevKit
