Difference between revisions of "Renesas DA148x"
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Revision as of 09:45, 11 April 2024
Contents
The Renesas DA148x devices are a family of multi-core Cortex-M33/Cortex-M0 based microcontrollers.
Flash Banks
QSPI Flash
QSPI flash programming requires special handling compared to internal flash. For more information about this, please see the QSPI Flash Programming Support article.
| Device | Base address | Maximum size | Supported |
|---|---|---|---|
| DA14850 | 0x38000000 | 128 MB | 
|
| DA14870 | 0x38000000 | 128 MB |
|
Watchdog
Device has a system watchdog. It is automatically frozen when Cortex-M33 is in debug mode.
Multi-Core Support
Before proceeding with this article, please check out the generic article regarding Multi-Core debugging here. The DA148x device include a Cortex-M33 and Cortex-M0. The debug related multi-core behavior of the J-Link is described for each core:
Cortex-M33
Init/Setup
- J-Link performs a default Cortex-M33 init sequence. No special handling is necessary.
Reset
- The devices uses normal Cortex-M reset, no special handling necessary, like described here.
Cortex-M0
Debugging of DA148x Cortex-M0 core is not supported.
Evaluation Boards
- Renesas DA148x DevKit evaluation board: Renesas DA14850/70 DBG MB
