Difference between revisions of "Renesas FPB-R9A02G021"
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The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the [SiliconVendor] [EvalBoardName].<br>It is a simple Hello World sample linked into the internal flash.<br> |
The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the [SiliconVendor] [EvalBoardName].<br>It is a simple Hello World sample linked into the internal flash.<br> |
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====SETUP==== |
====SETUP==== |
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*Hardware: [SiliconVendor] [EvalBoardName] |
*Hardware: [SiliconVendor] [EvalBoardName] |
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+ | *Link: [[File:Renesas_Sapporo5_R9A02G021_TestProject_ES_RV_7V20.zip]] |
Revision as of 17:50, 18 March 2024
This article describes specifics for the Renesas FPB-R9A02G021 evaluation board.
[PICTURE OF BOARD]
450px
Preparing for J-Link
- Connect the J-Link to J15.
- Power the board via J17.
- Verify the Connection with e.g. J-Link Commander. The output should look as follows:
[PICTURE OF CONNECT]
Example Project
The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the [SiliconVendor] [EvalBoardName].
It is a simple Hello World sample linked into the internal flash.
SETUP
- Embedded Studio RISC-V: V7.20
- Hardware: [SiliconVendor] [EvalBoardName]
- Link: File:Renesas Sapporo5 R9A02G021 TestProject ES RV 7V20.zip
