Difference between revisions of "Silicon Labs BRD4271A"
(→Preparing for J-Link) |
|||
Line 6: | Line 6: | ||
== Preparing for J-Link == |
== Preparing for J-Link == |
||
− | *Connect the J-Link to |
+ | *Connect the J-Link to the 20-pin debug connector. |
− | *Power the board |
+ | *Power the board using the mini USB connector. |
* Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows: |
* Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows: |
||
'''[PICTURE OF CONNECT]''' |
'''[PICTURE OF CONNECT]''' |
Revision as of 11:08, 14 June 2023
This article describes specifics for the Silicon Labs BRD4271A (EFR32xG25) extension board installed on the PCB4001 carrier board evaluation board.
[PICTURE OF BOARD]
450px
Preparing for J-Link
- Connect the J-Link to the 20-pin debug connector.
- Power the board using the mini USB connector.
- Verify the Connection with e.g. J-Link Commander. The output should look as follows:
Example Project
The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the [SiliconVendor] [EvalBoardName].
It is a simple Hello World sample linked into the internal flash.
SETUP
- J-Link software: V6.74
- Embedded Studio: V4.52b
- Hardware: [SiliconVendor] [EvalBoardName]
- Link: File:VENDOR DEVICENAME TestProject ES V452b.zip