Syntacore SCR1 SDK Arty
This article describes specifics for the Syntacore SCR1 Arty SDK.
Please note that a current J-Link model is needed for RISC-V support: Overview
J-Link supports the Syntacore SCR1 since the following J-Link software versions:
- Release: V6.42g (release) or later (Download latest release)
- Beta: V6.43d (beta) or later (Download latest beta)
Maximum JTAG speed
When debugging on the Syntacore SCR1 Arty SDK, the max. JTAG speed that can be used is 1 MHz. Speeds above 1 MHz will result in unstable operation of the debug interface on the device. The device sometimes simply returns garbage status info and data even though the signal quality of both sides is absolutely perfect. This is not a limitation of J-Link but of the Syntacore SCR1
Preparing for J-Link
The Syntacore SCR1 Arty SDK does not come with a standard debug connector but populates the debug JTAG signals on a custom connector. Therefore, it needs to be manually wired in case J-Link shall be connected to it.
In the following, it is described how the pins of connector JD on the ARTY board needs to be wired to J-Link. All pins of the J-Link side refer to the standard 0.1" 20-pin connector of J-Link.
|Pin JD (ARTY)||Pin J-Link||Description|
Note: The pins on the JD connector are numbered as follows: