Difference between revisions of "TI LP-CC1311P3"

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(Preparing for J-Link)
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== Preparing for J-Link ==
 
== Preparing for J-Link ==
*Connect the J-Link to ......
+
*Connect the J-Link to Target In
*Power the board via........
+
*Power the board via USB
 
* Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows:
 
* Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows:
 
'''[PICTURE OF CONNECT]'''
 
'''[PICTURE OF CONNECT]'''

Revision as of 11:25, 13 June 2023

This article describes specifics for the TI Launchpad CC1311P3 evaluation board.

TI LP-C1311P3 CC1311P3 board.jpg

Preparing for J-Link

  • Connect the J-Link to Target In
  • Power the board via USB
  • Verify the Connection with e.g. J-Link Commander. The output should look as follows:

[PICTURE OF CONNECT] VENDOR DEVICE CONNECT.PNG

Example Project

The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the [SiliconVendor] [EvalBoardName].
It is a simple Hello World sample linked into the internal flash.

SETUP