Difference between revisions of "TI LP-CC1311P3"
(→SETUP) |
(→Preparing for J-Link) |
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*Power the board via USB |
*Power the board via USB |
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* Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows: |
* Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows: |
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| + | [[File:TI_LP-CC1311P3_CC1311P3_connect.png|400px]] |
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| − | '''[PICTURE OF CONNECT]''' |
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| − | [[File:VENDOR_DEVICE_CONNECT.PNG|400px]] |
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== Example Project== |
== Example Project== |
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Revision as of 11:34, 13 June 2023
This article describes specifics for the TI Launchpad CC1311P3 evaluation board.
Preparing for J-Link
- Connect the J-Link to Target In
- Power the board via USB
- Verify the Connection with e.g. J-Link Commander. The output should look as follows:
Example Project
The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the [SiliconVendor] [EvalBoardName].
It is a simple Hello World sample linked into the internal flash.
SETUP
- J-Link software: V7.88g
- Embedded Studio: V6.34
- Hardware: [SiliconVendor] [EvalBoardName]
- Link: File:TI LP-C1311P3 CC1311P3 TestProject ES V634.zip
