Difference between revisions of "TI LP-CC1311P3"
(→Preparing for J-Link) |
|||
Line 7: | Line 7: | ||
== Preparing for J-Link == |
== Preparing for J-Link == |
||
*Connect the J-Link to Target In |
*Connect the J-Link to Target In |
||
+ | *Unpopulate the jumpers for used debug lines: RST/TMS/TCK/TDO/TDI/SWO |
||
*Power the board via USB |
*Power the board via USB |
||
* Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows: |
* Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows: |
Revision as of 11:40, 13 June 2023
This article describes specifics for the TI Launchpad CC1311P3 evaluation board.
Preparing for J-Link
- Connect the J-Link to Target In
- Unpopulate the jumpers for used debug lines: RST/TMS/TCK/TDO/TDI/SWO
- Power the board via USB
- Verify the Connection with e.g. J-Link Commander. The output should look as follows:
Example Project
The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the TI Launchpad CC1311P3.
It is a simple Hello World sample linked into the internal flash.
SETUP
- J-Link software: V7.88g
- Embedded Studio: V6.34
- Hardware: TI Launchpad CC1311P3
- Link: File:TI LP-C1311P3 CC1311P3 TestProject ES V634.zip